Problem Types & Solved Examples
Problem-Solving Framework
Every problem here follows: Given → What Examiner Tests → Concept Selection → Solution → Shortcut Insight.
This is not about memorizing solutions. This is about learning thinking patterns.
Type 1: Direct Formula Problems
Problem 1.1 CBSE Easy
In an intrinsic semiconductor, the electron concentration is 1.5 × 1010 cm-3 at room temperature. What is the hole concentration?
What Examiner Tests
Understanding of intrinsic semiconductor property: n = p = ni
Problem 1.2 NEET/JEE Main
An LED emits red light of wavelength 660 nm. Calculate the band gap energy of the semiconductor material used. (h = 6.63 × 10-34 J·s, c = 3 × 108 m/s, 1 eV = 1.6 × 10-19 J)
What Examiner Tests
Application of E = hc/λ and conversion between J and eV. Also tests quick formula: E(eV) = 1240/λ(nm)
Type 2: Conceptual Problems (No Calculation)
Problem 2.1 NEET/CBSE
A pure silicon crystal is doped with phosphorus atoms. What type of semiconductor is formed, and what are the majority charge carriers?
What Examiner Tests
Understanding of doping: pentavalent = n-type, trivalent = p-type
Type 3: Multi-Step Numerical Problems
Problem 3.1 JEE Main
A full-wave rectifier uses a transformer with secondary voltage of 20 V RMS. If the load resistance is 500 Ω and each diode has a forward resistance of 10 Ω, calculate: (a) Peak voltage (b) DC output voltage (c) DC current through load (d) Efficiency
What Examiner Tests
Multi-step problem combining: RMS to peak conversion, rectifier formulas, current calculation, efficiency
Type 4: Graph & Characteristic-Based Problems
Problem 4.1 CBSE/JEE Main
The I-V characteristic of a diode shows that at a forward voltage of 0.7 V, the current is 10 mA, and at 0.8 V, the current is 40 mA. Calculate the dynamic resistance of the diode between these two points.
What Examiner Tests
Understanding of dynamic resistance: rd = ΔV/ΔI (NOT V/I)
Type 5: Logic Gate Problems
Problem 5.1 NEET
If inputs to a NAND gate are A = 1 and B = 1, what is the output?
Type 6: Assertion-Reason (CBSE Pattern)
Problem 6.1 CBSE
Assertion (A): In forward bias, the depletion region width of a p-n junction decreases.
Reason (R): Forward bias reduces the barrier potential across the junction.
(a) Both A and R are true, and R is the correct explanation of A
(b) Both A and R are true, but R is not the correct explanation of A
(c) A is true but R is false
(d) A is false but R is true
Reason (R): Forward bias reduces the barrier potential across the junction.
(a) Both A and R are true, and R is the correct explanation of A
(b) Both A and R are true, but R is not the correct explanation of A
(c) A is true but R is false
(d) A is false but R is true